Custom AI ASIC Race Heats Up as Broadcom, Google Expand Deals

A Market Splitting by Workload

The fight over who builds the chips that power artificial intelligence has entered a new, more concrete phase. Rather than Nvidia's GPUs being displaced outright, the AI infrastructure market is fracturing by workload: Nvidia remains the default choice for flexible model training, while custom silicon from Google, Amazon, Microsoft and Meta is increasingly claiming the high-volume, repetitive job of inference — actually running trained models for users 124. Industry estimates now put inference at roughly two-thirds of all AI compute spend, which explains why hyperscalers are pouring billions into chips built specifically for serving models rather than training them 24.

Broadcom's Widening Footprint

Broadcom has emerged as the connective tissue of this shift. The company reported fiscal first-quarter 2026 revenue of $19.3 billion, up 29% year-over-year, with AI semiconductor revenue of $8.4 billion — a 106% jump — and guided to $10.7 billion in AI chip revenue for the following quarter 1112. Those numbers reflect Broadcom's role as a design-and-supply partner rather than a merchant chipmaker: it co-develops custom accelerators, packaging and networking gear for hyperscalers who want to own their silicon roadmap without building a full chip business from scratch.

An April regulatory filing formalized two major relationships: a long-term agreement to design and supply future generations of Google's TPUs plus networking components for Google's AI racks through as late as 2031, and an expansion of Broadcom's arrangement with Anthropic, which will access roughly 3.5 gigawatts of next-generation TPU-based compute starting in 2027 13. No contract value was disclosed in the filing, so widely circulated dollar figures describing the Google deal should be treated as outside estimates rather than confirmed numbers.

Meta followed with its own expanded Broadcom partnership, announced in mid-April, to co-develop multiple generations of its Meta Training and Inference Accelerator, or MTIA 1415. Meta described an initial commitment exceeding 1 gigawatt as the first phase of a multi-gigawatt rollout, with plans to deploy four new MTIA generations within two years to support recommendation systems and generative AI 14. Broadcom characterized the deal as the opening chapter of a sustained, multi-generation roadmap built on its XPU custom-accelerator platform, and Hock Tan is stepping off Meta's board into an advisory role tied to Meta's silicon strategy 1415. A gigawatt figure measures power capacity, not chip count or contract value, so it signals infrastructure scale rather than a precise unit of business.

Google Splits Training From Inference — and Adds Partners

Google's chip strategy has become the clearest illustration of the training/inference divide. At Cloud Next, Google detailed eighth-generation TPUs split explicitly by function: TPU 8t for frontier-model training and TPU 8i for inference and reinforcement learning 161718. Google says TPU 8t can scale to 9,600 chips and two petabytes of shared memory in a single superpod, delivering roughly triple the processing performance of the prior Ironwood generation, while TPU 8i triples on-chip SRAM to 384 MB and adds a dedicated Collectives Acceleration Engine to cut latency for serving large mixture-of-experts models 1617. Google claims up to 80% better inference performance-per-dollar than Ironwood — a vendor figure, not an independently verified benchmark 161718. Ironwood and Axion-based virtual machines are now generally available, following years of Google's decade-plus TPU investment that began in 2015 5910.

Google is also broadening its supplier base beyond Broadcom. Marvell Technology's stock hit a fresh all-time high after reports surfaced that Google is in discussions for two new chips: a memory processing unit meant to complement existing TPUs, and a new TPU built specifically for inference 6719. Those talks reportedly followed within days of the Broadcom long-term agreement, suggesting Google is diversifying rather than replacing its primary partner 619. Marvell's custom-silicon business already runs at roughly a $1.5 billion annual rate across 18 cloud-provider design wins, including work for Amazon's Trainium chips, Microsoft's Maia accelerator and a new Meta data-processing unit 1920. Reporting also describes Google working with MediaTek on lower-cost inference variants and with Intel on a separate deal covering Xeon processors and infrastructure processors for the networking and general-purpose layers around its TPUs 20. Marvell's broader deal with Google — covering AI inference accelerators, storage controllers, network interface controllers and memory-interface components — extends well beyond TPUs into the wider data-center silicon stack 3. Taken together, Google's supply chain now spans four external partners plus its own design team and TSMC fabrication, a structure explicitly built to avoid dependence on any single vendor 1920.

Nvidia's Response Focuses on Cost Per Token

Nvidia is not standing still. The company has emphasized upcoming Rubin-generation silicon and Dynamo inference software as its answer to the inference-economics argument, aiming to lower the cost of serving tokens rather than simply chasing peak training throughput 9. Nvidia has also pointed to its $20 billion deal with chip startup Groq as a source of technology for faster response times in agentic and reasoning workloads 9. The company retains structural advantages that custom chips still struggle to match: the CUDA software ecosystem, hardware flexibility across changing model architectures, merchant availability across multiple clouds, and continued dominance in large-scale training.

Why Inference Is the Real Battleground

The distinction between training and inference explains much of the current maneuvering. Training runs are episodic but computationally enormous, rewarding flexibility and rapid support for new model designs — Nvidia's traditional strength. Inference, by contrast, runs continuously and scales with usage, making cost per query, memory bandwidth and power efficiency the dominant variables — conditions that favor fixed-function, purpose-built silicon 20. One market projection cited across the coverage puts custom-ASIC growth at 44.6% annually through 2033, more than double the 16.1% CAGR expected for general-purpose GPUs, with the overall AI accelerator market reaching roughly $604 billion by then and the custom-ASIC segment alone approaching $118 billion by 2033 41920. TrendForce figures cited elsewhere put 2026 custom-chip sales growth at 45%, compared with 16% for GPU shipments 20.

Diverging Views on How Fast the Shift Happens

Coverage of the trend is not uniform in tone. Some outlets frame the moment as a direct challenge to Nvidia's dominance, pointing to Google's four-partner supply chain and Marvell's expanding design-win list as evidence that hyperscalers are meaningfully reducing reliance on merchant GPUs 6720. Others strike a more cautious note, observing that once a supplier like Broadcom secures an effective monopoly position in custom silicon, pricing and licensing leverage tend to rise over time — a dynamic some commentators compare to Broadcom's post-acquisition changes at VMware 8. That same commentary also flags an odd expansion of custom-chip demand into unexpected areas, including specialized silicon reportedly being developed for robotaxi applications 8.

The Bigger Picture

None of this amounts to Nvidia being pushed aside. Every major hyperscaler is simultaneously buying Nvidia GPUs and building its own accelerators, and custom chips still depend on the same constrained global supply of advanced packaging, high-bandwidth memory and leading-edge fabrication capacity that Nvidia competes for 14. What has changed is the scale and permanence of the commitments: multi-year, multi-gigawatt agreements between Broadcom and Google, Broadcom and Meta, and Broadcom and Anthropic signal that custom silicon has moved past the experimental stage into long-range infrastructure planning 1314. Google's addition of Marvell as a potential third TPU-related design partner, layered onto existing work with Broadcom and MediaTek, underscores that hyperscalers now treat chip-supplier diversification as a strategic necessity rather than an optional hedge 1920.

The practical result, at least for now, is a more heterogeneous AI hardware market rather than a clean changing of the guard. Nvidia continues to anchor training workloads and set the pace with new platform announcements, while custom ASICs from Google, Amazon, Microsoft and Meta increasingly absorb the ballooning, cost-sensitive work of inference — the layer of AI computing that is growing fastest and mattering most to the bottom line 2419.